Research

The MAJesty project aims at developing logic synthesis algorithms and applications based on majority logic. The research is grouped into the three main categories theory, algorithms, and applications. In the theoretical research we want to investigate different forms of majority-based logic and its promising combination with XOR-based logic. In the algorithmic research we develop dedicated approaches tailored for functions of different complexity. As applications we propose synthesis of arithmetic components motivated by results from circuit complexity, threshold logic optimization, inverter optimization, and synthesis for verification. In particular the last application is of high interest, as formal verification is often the bottleneck in today's design flows.

The goal for this student exchange research project is to develop methods to map generalized quantum computing algorithms to specific architectures. Resulting algorithms will become part of a quantum logic synthesis tool. Emphasis will be placed on developing a synthesis tool that improves circuit fidelity, gate volume, and gate depth.

The project develops new methods for reverse engineering a circuit aiming at increasing the efficiency of formal verification.

This project aims to coordinate the research efforts of European expertise to foster the development in reversible logic for software and hardware and both from a theoretical and practical point of view.